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author | Mattias Andrée <maandree@kth.se> | 2023-12-16 12:40:10 +0100 |
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committer | Mattias Andrée <maandree@kth.se> | 2023-12-16 12:40:10 +0100 |
commit | 683f205402a99cfc8cea46c83ce9b46a42616d42 (patch) | |
tree | f6ee1619454a6ec8b9e31770bbbc2abf36aae2fd /libsyscalls_get_integer_alignment.c | |
parent | Improve portability (diff) | |
download | libsyscalls-683f205402a99cfc8cea46c83ce9b46a42616d42.tar.gz libsyscalls-683f205402a99cfc8cea46c83ce9b46a42616d42.tar.bz2 libsyscalls-683f205402a99cfc8cea46c83ce9b46a42616d42.tar.xz |
All kinds of stuff
Signed-off-by: Mattias Andrée <maandree@kth.se>
Diffstat (limited to '')
-rw-r--r-- | libsyscalls_get_integer_alignment.c | 42 |
1 files changed, 36 insertions, 6 deletions
diff --git a/libsyscalls_get_integer_alignment.c b/libsyscalls_get_integer_alignment.c index 7802a06..1c2d10e 100644 --- a/libsyscalls_get_integer_alignment.c +++ b/libsyscalls_get_integer_alignment.c @@ -19,20 +19,50 @@ libsyscalls_get_integer_alignment(enum libsyscalls_os os, enum libsyscalls_arch break; case LIBSYSCALLS_ARCH_I386: + case LIBSYSCALLS_ARCH_ARM_OABI_LE: /* https://wiki.debian.org/ArmEabiPort#A64-bit_data_type_alignment */ + case LIBSYSCALLS_ARCH_ARM_OABI_BE: + case LIBSYSCALLS_ARCH_SH_LE: /* https://www.st.com/resource/en/reference_manual/rm0197-sh4-generic-and-c-specific-application-binary-interface-stmicroelectronics.pdf (page 12) */ + case LIBSYSCALLS_ARCH_SH_BE: + case LIBSYSCALLS_ARCH_MICROBLAZE_32_LE: /* https://www.ecb.torontomu.ca/~courses/ee8205/Data-Sheets/sopc/MicroBlaze_DataSheet.pdf */ + case LIBSYSCALLS_ARCH_MICROBLAZE_32_BE: maxalign = 32; break; case LIBSYSCALLS_ARCH_AMD64: case LIBSYSCALLS_ARCH_AMD64_X32: - case LIBSYSCALLS_ARCH_ALPHA: /* https://static.lwn.net/images/pdf/LDD3/ch11.pdf */ - case LIBSYSCALLS_ARCH_IA64: /* https://static.lwn.net/images/pdf/LDD3/ch11.pdf */ - case LIBSYSCALLS_ARCH_MIPS_O32: /* https://static.lwn.net/images/pdf/LDD3/ch11.pdf */ + case LIBSYSCALLS_ARCH_ARM_EABI_LE: /* https://wiki.debian.org/ArmEabiPort#A64-bit_data_type_alignment */ + case LIBSYSCALLS_ARCH_ARM_EABI_BE: + case LIBSYSCALLS_ARCH_ALPHA_LE: /* https://static.lwn.net/images/pdf/LDD3/ch11.pdf */ + case LIBSYSCALLS_ARCH_ALPHA_BE: + case LIBSYSCALLS_ARCH_IA64_LE: /* https://static.lwn.net/images/pdf/LDD3/ch11.pdf */ + case LIBSYSCALLS_ARCH_IA64_BE: + case LIBSYSCALLS_ARCH_IA64_P32_LE: + case LIBSYSCALLS_ARCH_IA64_P32_BE: + case LIBSYSCALLS_ARCH_MIPS_O32_LE: /* https://static.lwn.net/images/pdf/LDD3/ch11.pdf */ + case LIBSYSCALLS_ARCH_MIPS_O32_BE: + case LIBSYSCALLS_ARCH_MIPS_N32_LE: /* https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00083-2B-MIPS64INT-AFP-05.04.pdf (page 40) */ + case LIBSYSCALLS_ARCH_MIPS_N32_BE: + case LIBSYSCALLS_ARCH_MIPS_N64_LE: + case LIBSYSCALLS_ARCH_MIPS_N64_BE: case LIBSYSCALLS_ARCH_PARISC_32: /* https://www.ece.lsu.edu/ee4720/doc/pa1.1.pdf (page 26) */ case LIBSYSCALLS_ARCH_PARISC_64: - case LIBSYSCALLS_ARCH_POWERPC_32: /* https://static.lwn.net/images/pdf/LDD3/ch11.pdf */ + case LIBSYSCALLS_ARCH_POWERPC_32_LE: /* https://static.lwn.net/images/pdf/LDD3/ch11.pdf */ + case LIBSYSCALLS_ARCH_POWERPC_32_BE: + case LIBSYSCALLS_ARCH_POWERPC_64_LE: /* https://www.slac.stanford.edu/exp/npa/software/eabi_app.pdf */ + case LIBSYSCALLS_ARCH_POWERPC_64_BE: + case LIBSYSCALLS_ARCH_POWERPC_NOSPU_LE: + case LIBSYSCALLS_ARCH_POWERPC_NOSPU_BE: + case LIBSYSCALLS_ARCH_POWERPC_SPU_LE: + case LIBSYSCALLS_ARCH_POWERPC_SPU_BE: + case LIBSYSCALLS_ARCH_S390_32: /* https://refspecs.linuxbase.org/ELF/zSeries/lzsabi0_s390.html */ + case LIBSYSCALLS_ARCH_S390_64: case LIBSYSCALLS_ARCH_SPARC_32: /* https://www.gaisler.com/doc/sparcv8.pdf (page 46) */ - case LIBSYSCALLS_ARCH_SPARC_64: /* https://static.lwn.net/images/pdf/LDD3/ch11.pdf */ - case LIBSYSCALLS_ARCH_XTENSA: /* https://loboris.eu/ESP32/Xtensa_lx%20Overview%20handbook.pdf (page 97) */ + case LIBSYSCALLS_ARCH_SPARC_64_LE: /* https://static.lwn.net/images/pdf/LDD3/ch11.pdf */ + case LIBSYSCALLS_ARCH_SPARC_64_BE: + case LIBSYSCALLS_ARCH_XTENSA_LE: /* https://loboris.eu/ESP32/Xtensa_lx%20Overview%20handbook.pdf (page 97) */ + case LIBSYSCALLS_ARCH_XTENSA_BE: + case LIBSYSCALLS_ARCH_MICROBLAZE_64_LE: /* https://www.amd.com/content/dam/xilinx/support/documents/sw_manuals/xilinx2021_2/ug984-vivado-microblaze-ref.pdf */ + case LIBSYSCALLS_ARCH_MICROBLAZE_64_BE: maxalign = 64; break; |